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The CPU Card comes with a 220 ? termination resistor and 681 ? bias resistors already
installed and enabled with jumpers across pins 1–2 and 5–6 on header JP1, as shown in
Figure 12.
5
3
1
Factory
Default
JP1
6
4
2
J3
C19
C23
C24
C25
U10 C27
C28
U6
C26
J6
J7
R5
C4
C7
Y1
R11
R12
C11
R17
C18
J4
J4
C35
C46
C49
R2
RP4
U8
C53
U6
JP1
1
Battery
RT1
C1
C2
R4
C3
R1
D1
R3
D2
Y2
U3
C10
R13
U1
C13
C15
C16
J5
R21
C21
R23
Q1
U9
R26
Q3
J5
Y3
C31
6
C32
C33
7
485+
C36
C41
D3
BT1
D5
R42 5
U14
J8 bias
2
termi-
nation
6
bias
R22
681 W
R18
220 W
R19
681 W
485?
Figure 12. RS-485 Termination and Bias Resistors
For best performance, the bias and termination resistors in a multidrop network should
only be enabled on both end nodes of the network. Disable the termination and bias resis-
tors on any intervening Smart Star units in the network by removing both jumpers from
header JP1.
TIP: Save the jumpers for possible future use by “parking” them across pins 1–3 and 4–6
of header JP1. Pins 3 and 4 are not otherwise connected to the CPU Card.
34
Smart Star (SR9000)
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